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IBM C4070-604 Exam Syllabus Topics:

IBM System z Technical V5 Sample Questions:

1. A customer wants to consolidate 100 four core Intel servers to z196 with z/VM and Linux on System z. Which of the following will establish the number of required IFLs?

A) The consolidation ratio is 25:1, they need 16 IFLs
B) Add the GHz of the Intel CPUs and divide it by 5.2 (the clock speed of the z196 in GHz). The result is the number of IFLs needed
C) Perform a BVAT study
D) Collect data on the Intel servers?type and model, utilization, and workload, and then ask Techline for a sizing

2. A System z customer technical staff is planning to upgrade their z9 to a new z114 with a Migration Offering. The customer group is discussing their plan with the System z technical specialist. Which of the following customer statements is in error and must be corrected by the technical specialist?

A) For a Migration Offering upgrade the existing mainframe and parts must be returned to IBM within 120 days of the z114 ship date.
B) The post installation plan should include disaster recovery considerations including emergency generators for operations, lighting and cooling.
C) The post installation plan should consider that the z114 might have to be taken out of service for micro code updates
D) The plan must include an accurate measurement of the z114 performance and capacity.

3. What is a key security differentiator of z/OS compared to distributed server operating systems?

A) z/OS utilizes LDAP to provide an end-to-end security context.
B) z/OS provides a role based access method.
C) Applications run in enclaves which provide security by isolation.
D) z/OS utilizes SAF products like RACF to provide end to end security context

4. Which of the following is an advantage of PCIe I/O drawers over I/O cages?

A) Support of Crypto Express cards
B) Support of increased number of features and ports per volume
C) Support of over 240 ESCON cards
D) Support of more ports per installed feature

5. Which new z196 feature provides significant error detection and correction capabilities for bit, lane, DRAM, DIMM socket and memory channel failures?

A) RAS
B) RACEv
C) RAID
D) RAIM

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